High-k dielectrics for future generation memory devices (Invited Paper)

Publication Type:

Journal Article

Source:

Microelectronic Engineering, Volume 86, Number 7-9, p.1789-1795 (2009)

ISBN:

0167-9317

Accession Number:

http://apps.isiknowledge.com/InboundService.do?Func=Frame&product=WOS&action=retrieve&SrcApp=EndNote&Init=Yes&SrcAuth=ResearchSoft&mode=FullRecord&UT=000267460100070

Keywords:

atomic layer deposition, dram, electrical-properties, flash, high-k, kappa gate dielectrics, oxides, srtio3, srtio3 thin-films

Abstract:

The requirements and development of high-k dielectric films for application in storage cells of future generation flash and Dynamic Random Access Memory (DRAM) devices are reviewed. Dielectrics with k-value in the 9-30 range are studied as insulators between charge storage layers and control gates in flash devices. For this application, large band gaps (>6 eV) and band offsets are required, as well as low trap densities. Materials studied include aluminates and scandates. For DRAM metal-insulator-metal (MIM) capacitors, aggressive scaling of the equivalent oxide thickness (with targets down to 0.3 nm) drives the research towards dielectrics with k-values >50. Due to the high aspect ratio of MIMCap structures, highly conformal deposition techniques are needed, triggering a substantial effort to develop Atomic Layer Deposition (ALD) processes for the deposition of metal gates and high-k dielectrics. Materials studied include Sr- and Ba-based perovskites, with SrTiO3 as one of the most promising candidates, as well as tantalates, titanates and niobates. (C) 2009 Elsevier B.V. All rights reserved.

Notes:

463VHTimes Cited:21Cited References Count:25

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